Real-Time FPGA-Based Detection of Speeded-Up Robust Features Using Separable Convolution

Petr Cizek, Jan Faigl. Real-Time FPGA-Based Detection of Speeded-Up Robust Features Using Separable Convolution. IEEE Trans. Industrial Informatics, 14(3):1155-1163, 2018. [doi]

@article{CizekF18,
  title = {Real-Time FPGA-Based Detection of Speeded-Up Robust Features Using Separable Convolution},
  author = {Petr Cizek and Jan Faigl},
  year = {2018},
  doi = {10.1109/TII.2017.2764485},
  url = {https://doi.org/10.1109/TII.2017.2764485},
  researchr = {https://researchr.org/publication/CizekF18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Industrial Informatics},
  volume = {14},
  number = {3},
  pages = {1155-1163},
}