Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation

Christopher Claus, Robert Huitl, Joachim Rausch, Walter Stechele. Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation. In Martin Danek, Jiri Kadlec, Brent E. Nelson, editors, 19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic. pages 138-145, IEEE, 2009. [doi]

Abstract

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