A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Sylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche. A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform. In 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011. pages 117-120, IEEE, 2011. [doi]

This author has not been identified. Look up 'Sylvain Clerc' in GoogleThis author has not been identified. Look up 'Fady Abouzeid' in GoogleThis author has not been identified. Look up 'Fabrice Argoud' in GoogleThis author has not been identified. Look up 'Abhay Kumar' in GoogleThis author has not been identified. Look up 'Rajesh Kumar' in GoogleThis author has not been identified. Look up 'Philippe Roche' in Google

runs on WebDSL