A 28nm FD-SOI standard cell 0.6-1.2V open-loop frequency multiplier for low power SoC clocking

Martin Cochet, Sylvain Clerc, Mehdi Naceur, Pierre Schamberger, Damien Croain, Jean-Luc Autran, Philippe Roche. A 28nm FD-SOI standard cell 0.6-1.2V open-loop frequency multiplier for low power SoC clocking. In IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016. pages 1206-1209, IEEE, 2016. [doi]

Authors

Martin Cochet

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Sylvain Clerc

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Mehdi Naceur

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Pierre Schamberger

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Damien Croain

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Jean-Luc Autran

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Philippe Roche

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