Netlist Optimization by Gate Merging

Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis. Netlist Optimization by Gate Merging. In 27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019. pages 236-237, IEEE, 2019. [doi]

@inproceedings{ConceicaoR19-0,
  title = {Netlist Optimization by Gate Merging},
  author = {Calebe Micael de Oliveira Conceição and Ricardo Augusto da Luz Reis},
  year = {2019},
  doi = {10.1109/VLSI-SoC.2019.8920291},
  url = {https://doi.org/10.1109/VLSI-SoC.2019.8920291},
  researchr = {https://researchr.org/publication/ConceicaoR19-0},
  cites = {0},
  citedby = {0},
  pages = {236-237},
  booktitle = {27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-3915-9},
}