Technology Mapping for FPGAs with Nonuniform Pin Delays and Fast Interconnections

Jason Cong, Yean-Yow Hwang, Songjie Xu. Technology Mapping for FPGAs with Nonuniform Pin Delays and Fast Interconnections. In DAC. pages 373-378, 1999. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.