Fast exposure simulation for large circuit patterns in electron beam lithography

B. D. Cook, Soo-Young Lee. Fast exposure simulation for large circuit patterns in electron beam lithography. In ICIP. pages 442-445, 1995. [doi]

@inproceedings{CookL95,
  title = {Fast exposure simulation for large circuit patterns in electron beam lithography},
  author = {B. D. Cook and Soo-Young Lee},
  year = {1995},
  url = {http://computer.org/proceedings/icip/7310/volume1/73100442abs.htm},
  researchr = {https://researchr.org/publication/CookL95},
  cites = {0},
  citedby = {0},
  pages = {442-445},
  booktitle = {ICIP},
}