A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness

Henry Cook, Miquel Moretó, Sarah Bird, Khanh Dao, David A. Patterson, Krste Asanovic. A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness. In Avi Mendelson, editor, The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013. pages 308-319, ACM, 2013. [doi]

Authors

Henry Cook

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Miquel Moretó

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Sarah Bird

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Khanh Dao

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David A. Patterson

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Krste Asanovic

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