VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash

Lanlan Cui, Fei Wu 0005, Xiaojian Liu, Meng Zhang 0014, Changsheng Xie. VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash. In 37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019. pages 668-671, IEEE, 2019. [doi]

@inproceedings{CuiWLZX19,
  title = {VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash},
  author = {Lanlan Cui and Fei Wu 0005 and Xiaojian Liu and Meng Zhang 0014 and Changsheng Xie},
  year = {2019},
  doi = {10.1109/ICCD46524.2019.00096},
  url = {https://doi.org/10.1109/ICCD46524.2019.00096},
  researchr = {https://researchr.org/publication/CuiWLZX19},
  cites = {0},
  citedby = {0},
  pages = {668-671},
  booktitle = {37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019},
  publisher = {IEEE},
  isbn = {978-1-5386-6648-7},
}