Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors

Brian W. Curran, Mary Gifaldi, Jason Martin, Alper Buyuktosunoglu, Martin Margala, David H. Albonesi. Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors. In Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes, editors, SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC 01), December 3-5, 2001, Montpellier, France. Volume 218 of IFIP Conference Proceedings, pages 289-300, Kluwer, 2001.

@inproceedings{CurranGMBMA01,
  title = {Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors},
  author = {Brian W. Curran and Mary Gifaldi and Jason Martin and Alper Buyuktosunoglu and Martin Margala and David H. Albonesi},
  year = {2001},
  researchr = {https://researchr.org/publication/CurranGMBMA01},
  cites = {0},
  citedby = {0},
  pages = {289-300},
  booktitle = {SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC 01), December 3-5, 2001, Montpellier, France},
  editor = {Michel Robert and Bruno Rouzeyre and Christian Piguet and Marie-Lise Flottes},
  volume = {218},
  series = {IFIP Conference Proceedings},
  publisher = {Kluwer},
  isbn = {1-4020-7148-5},
}