Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors

Brian W. Curran, Mary Gifaldi, Jason Martin, Alper Buyuktosunoglu, Martin Margala, David H. Albonesi. Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors. In Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes, editors, SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC 01), December 3-5, 2001, Montpellier, France. Volume 218 of IFIP Conference Proceedings, pages 289-300, Kluwer, 2001.

Abstract

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