Generating VHDL models from natural language descriptions

Walling R. Cyre, Jim Armstrong, M. Manek-Honcharik, Alexander J. Honcharik. Generating VHDL models from natural language descriptions. In Jean Mermet, editor, Proceedings EURO-DAC 94, European Design Automation Conference, Grenoble, France, September 19-22, 1994. pages 474-479, IEEE Computer Society, 1994. [doi]

@inproceedings{CyreAMH94,
  title = {Generating VHDL models from natural language descriptions},
  author = {Walling R. Cyre and Jim Armstrong and M. Manek-Honcharik and Alexander J. Honcharik},
  year = {1994},
  doi = {10.1145/198174.198306},
  url = {http://doi.acm.org/10.1145/198174.198306},
  tags = {modeling language, language modeling},
  researchr = {https://researchr.org/publication/CyreAMH94},
  cites = {0},
  citedby = {0},
  pages = {474-479},
  booktitle = {Proceedings EURO-DAC 94, European Design Automation Conference, Grenoble, France, September 19-22, 1994},
  editor = {Jean Mermet},
  publisher = {IEEE Computer Society},
  isbn = {0-89791-685-9},
}