Silicon Verification using High-Level Design Tools (Abstract Only)

Tomasz S. Czajkowski. Silicon Verification using High-Level Design Tools (Abstract Only). In George A. Constantinides, Deming Chen, editors, Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015. pages 272, ACM, 2015. [doi]

Abstract

Abstract is missing.