A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator

Sai Manoj P. D., Jie Lin, Shikai Zhu, Yingying Yin, Xu Liu, Xiwei Huang, Chongshen Song, Wenqi Zhang, Mei Yan, Zhiyi Yu, Hao Yu. A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator. IEEE Trans. on Circuits and Systems, 64-I(6):1432-1443, 2017. [doi]

@article{DLZYLHSZYYY17,
  title = {A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator},
  author = {Sai Manoj P. D. and Jie Lin and Shikai Zhu and Yingying Yin and Xu Liu and Xiwei Huang and Chongshen Song and Wenqi Zhang and Mei Yan and Zhiyi Yu and Hao Yu},
  year = {2017},
  doi = {10.1109/TCSI.2016.2647322},
  url = {https://doi.org/10.1109/TCSI.2016.2647322},
  researchr = {https://researchr.org/publication/DLZYLHSZYYY17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {64-I},
  number = {6},
  pages = {1432-1443},
}