Pawel Dabal, Ryszard Pelka. A chaos-based pseudo-random bit generator implemented in FPGA device. In Rolf Kraemer, Adam Pawlak, Andreas Steininger, Mario Schölzel, Jaan Raik, Heinrich Theodor Vierhaus, editors, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011. pages 151-154, IEEE, 2011. [doi]
@inproceedings{DabalP11,
title = {A chaos-based pseudo-random bit generator implemented in FPGA device},
author = {Pawel Dabal and Ryszard Pelka},
year = {2011},
doi = {10.1109/DDECS.2011.5783069},
url = {http://dx.doi.org/10.1109/DDECS.2011.5783069},
researchr = {https://researchr.org/publication/DabalP11},
cites = {0},
citedby = {0},
pages = {151-154},
booktitle = {14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011},
editor = {Rolf Kraemer and Adam Pawlak and Andreas Steininger and Mario Schölzel and Jaan Raik and Heinrich Theodor Vierhaus},
publisher = {IEEE},
isbn = {978-1-4244-9755-3},
}