Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits

Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen. Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 22(5):517-534, 2003. [doi]

@article{DaemsGS03,
  title = {Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits},
  author = {Walter Daems and Georges G. E. Gielen and Willy M. C. Sansen},
  year = {2003},
  doi = {10.1109/TCAD.2003.810742},
  url = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2003.810742},
  tags = {rule-based, C++, e-science},
  researchr = {https://researchr.org/publication/DaemsGS03},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {22},
  number = {5},
  pages = {517-534},
}