Jakub Dalecki, Rafal Dlugosz, Tomasz Talaska, Gunter Fischer. A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology. In Andrzej Napieralksi, editor, 26th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2019, Rzeszów, Poland, June 27-29, 2019. pages 151-156, IEEE, 2019. [doi]
Abstract is missing.