An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol

Mamata Dalui, Biplab K. Sikdar. An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol. In Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay, editors, Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings. Volume 7373 of Lecture Notes in Computer Science, pages 89-98, Springer, 2012. [doi]

@inproceedings{DaluiS12,
  title = {An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol},
  author = {Mamata Dalui and Biplab K. Sikdar},
  year = {2012},
  doi = {10.1007/978-3-642-31494-0_11},
  url = {http://dx.doi.org/10.1007/978-3-642-31494-0_11},
  researchr = {https://researchr.org/publication/DaluiS12},
  cites = {0},
  citedby = {0},
  pages = {89-98},
  booktitle = {Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings},
  editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay},
  volume = {7373},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-642-31493-3},
}