Luka Daoud, Dawid Zydek, Henry Selvaraj. A Survey on Design and Implementation of Floating Point Adder in FPGA. In Henry Selvaraj, Dawid Zydek, Grzegorz Chmaj, editors, Progress in Systems Engineering - Proceedings of the Twenty-Third International Conference on Systems Engineering, ICSEng 2014, Las Vegas, NV, USA, August 19-21, 2014. Volume 366 of Advances in Intelligent Systems and Computing, pages 885-892, Springer, 2014. [doi]
@inproceedings{DaoudZS14, title = {A Survey on Design and Implementation of Floating Point Adder in FPGA}, author = {Luka Daoud and Dawid Zydek and Henry Selvaraj}, year = {2014}, doi = {10.1007/978-3-319-08422-0_129}, url = {https://doi.org/10.1007/978-3-319-08422-0_129}, researchr = {https://researchr.org/publication/DaoudZS14}, cites = {0}, citedby = {0}, pages = {885-892}, booktitle = {Progress in Systems Engineering - Proceedings of the Twenty-Third International Conference on Systems Engineering, ICSEng 2014, Las Vegas, NV, USA, August 19-21, 2014}, editor = {Henry Selvaraj and Dawid Zydek and Grzegorz Chmaj}, volume = {366}, series = {Advances in Intelligent Systems and Computing}, publisher = {Springer}, isbn = {978-3-319-08421-3}, }