A Survey on Design and Implementation of Floating Point Adder in FPGA

Luka Daoud, Dawid Zydek, Henry Selvaraj. A Survey on Design and Implementation of Floating Point Adder in FPGA. In Henry Selvaraj, Dawid Zydek, Grzegorz Chmaj, editors, Progress in Systems Engineering - Proceedings of the Twenty-Third International Conference on Systems Engineering, ICSEng 2014, Las Vegas, NV, USA, August 19-21, 2014. Volume 366 of Advances in Intelligent Systems and Computing, pages 885-892, Springer, 2014. [doi]

Abstract

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