Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT - researchr publication authors

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Anand D. Darji, Nisarg Trivedi, S. N. Merchant, Arun N. Chandorkar. Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 1014-1017, IEEE, 2012. [doi]

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