VHDL design and simulation of MAM memory for LAPCAM parallel architecture for image processing - researchr publication

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I. Darmawan, W. T. Hartono, Eril Mozef, S. Sutikno, Kuspriyanto. VHDL design and simulation of MAM memory for LAPCAM parallel architecture for image processing. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 389-392, IEEE, 2002. [doi]

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