A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering

Simone Mattia Dartizio, Francesco Tesolin, Giacomo Castoro, Francesco Buccoleri, Michele Rossoni, Dmytro Cherniak, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering. J. Solid-State Circuits, 58(12):3320-3337, December 2023. [doi]

@article{DartizioTCBRCSLL23,
  title = {A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering},
  author = {Simone Mattia Dartizio and Francesco Tesolin and Giacomo Castoro and Francesco Buccoleri and Michele Rossoni and Dmytro Cherniak and Carlo Samori and Andrea L. Lacaita and Salvatore Levantino},
  year = {2023},
  month = {December},
  doi = {10.1109/JSSC.2023.3311681},
  url = {https://doi.org/10.1109/JSSC.2023.3311681},
  researchr = {https://researchr.org/publication/DartizioTCBRCSLL23},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {58},
  number = {12},
  pages = {3320-3337},
}