Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

Bishnu Prasad Das, Janakiraman V. Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind. Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 685-691, IEEE Computer Society, 2008. [doi]

@inproceedings{DasAJA08,
  title = {Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations},
  author = {Bishnu Prasad Das and Janakiraman V. Bharadwaj Amrutur and H. S. Jamadagni and N. V. Arvind},
  year = {2008},
  doi = {10.1109/VLSI.2008.92},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.92},
  researchr = {https://researchr.org/publication/DasAJA08},
  cites = {0},
  citedby = {0},
  pages = {685-691},
  booktitle = {21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India},
  publisher = {IEEE Computer Society},
}