Bipul Das, Swapna Banerjee. A Memory Efficient 3-D DWT Architecture. In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 208, IEEE Computer Society, 2003. [doi]
@inproceedings{DasB03,
title = {A Memory Efficient 3-D DWT Architecture},
author = {Bipul Das and Swapna Banerjee},
year = {2003},
url = {http://csdl.computer.org/comp/proceedings/vlsid/2003/1868/00/18680208abs.htm},
tags = {architecture},
researchr = {https://researchr.org/publication/DasB03},
cites = {0},
citedby = {0},
pages = {208},
booktitle = {16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-1868-0},
}