Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty. Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3-D Small-World Network-on-Chip. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(5):719-732, 2017. [doi]
@article{DasDPC17,
title = {Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3-D Small-World Network-on-Chip},
author = {Sourav Das and Janardhan Rao Doppa and Partha Pratim Pande and Krishnendu Chakrabarty},
year = {2017},
doi = {10.1109/TCAD.2016.2604288},
url = {http://dx.doi.org/10.1109/TCAD.2016.2604288},
researchr = {https://researchr.org/publication/DasDPC17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {36},
number = {5},
pages = {719-732},
}