Satyajit Das, Thomas Peyret, Kevin Martin, Gwenolé Corre, Mathieu Thevenin, Philippe Coussy. A Scalable Design Approach to Efficiently Map Applications on CGRAs. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016. pages 655-660, IEEE, 2016. [doi]
@inproceedings{DasPMCTC16, title = {A Scalable Design Approach to Efficiently Map Applications on CGRAs}, author = {Satyajit Das and Thomas Peyret and Kevin Martin and Gwenolé Corre and Mathieu Thevenin and Philippe Coussy}, year = {2016}, doi = {10.1109/ISVLSI.2016.54}, url = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2016.54}, researchr = {https://researchr.org/publication/DasPMCTC16}, cites = {0}, citedby = {0}, pages = {655-660}, booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016}, publisher = {IEEE}, isbn = {978-1-4673-9039-2}, }