Accelerated FPGA architecture design: Capabilities and limitations of analytical models

Joydip Das, Steven J. E. Wilton. Accelerated FPGA architecture design: Capabilities and limitations of analytical models. In Russell Tessier, editor, 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011. pages 1-8, IEEE, 2011. [doi]

@inproceedings{DasW11-1,
  title = {Accelerated FPGA architecture design: Capabilities and limitations of analytical models},
  author = {Joydip Das and Steven J. E. Wilton},
  year = {2011},
  doi = {10.1109/FPT.2011.6132684},
  url = {http://dx.doi.org/10.1109/FPT.2011.6132684},
  researchr = {https://researchr.org/publication/DasW11-1},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011},
  editor = {Russell Tessier},
  publisher = {IEEE},
  isbn = {978-1-4577-1741-3},
}