Modeling post-techmapping and post-clustering FPGA circuit depth - researchr publication authors

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Joydip Das, Steven J. E. Wilton, Philip Heng Wai Leong, Wayne Luk. Modeling post-techmapping and post-clustering FPGA circuit depth. In Martin Danek, Jiri Kadlec, Brent E. Nelson, editors, 19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic. pages 205-211, IEEE, 2009. [doi]

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