A Timing Aware Connectivity Optimization Technique for Improving Energy Efficiency of High-Performance CPUs

Ayan Datta, Karanvir Singh, Arpita Dutta, Kousik Debnath. A Timing Aware Connectivity Optimization Technique for Improving Energy Efficiency of High-Performance CPUs. In IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2021, Tokyo, Japan, April 14-16, 2021. pages 1-6, IEEE, 2021. [doi]

@inproceedings{DattaSDD21,
  title = {A Timing Aware Connectivity Optimization Technique for Improving Energy Efficiency of High-Performance CPUs},
  author = {Ayan Datta and Karanvir Singh and Arpita Dutta and Kousik Debnath},
  year = {2021},
  doi = {10.1109/COOLCHIPS52128.2021.9410326},
  url = {https://doi.org/10.1109/COOLCHIPS52128.2021.9410326},
  researchr = {https://researchr.org/publication/DattaSDD21},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2021, Tokyo, Japan, April 14-16, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-1503-3},
}