Partha De, Kunal Banerjee, Chittaranjan A. Mandal. A BDD based secure hardware design method to guard against power analysis attacks. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-2, IEEE, 2014. [doi]
@inproceedings{DeBM14-0,
title = {A BDD based secure hardware design method to guard against power analysis attacks},
author = {Partha De and Kunal Banerjee and Chittaranjan A. Mandal},
year = {2014},
doi = {10.1109/ISVDAT.2014.6881088},
url = {http://dx.doi.org/10.1109/ISVDAT.2014.6881088},
researchr = {https://researchr.org/publication/DeBM14-0},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014},
publisher = {IEEE},
isbn = {978-1-4799-5088-1},
}