From multicore LDPC decoder implementations to FPGA decoder architectures: a case study

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo. From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. In 25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018. pages 89-92, IEEE, 2018. [doi]

@inproceedings{DelomierGCJ18,
  title = {From multicore LDPC decoder implementations to FPGA decoder architectures: a case study},
  author = {Yann Delomier and Bertrand Le Gal and Jérémie Crenne and Christophe Jégo},
  year = {2018},
  doi = {10.1109/ICECS.2018.8617957},
  url = {https://doi.org/10.1109/ICECS.2018.8617957},
  researchr = {https://researchr.org/publication/DelomierGCJ18},
  cites = {0},
  citedby = {0},
  pages = {89-92},
  booktitle = {25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-9562-3},
}