A novel hardware architecture design for binary arithmetic decoder engines based on bitstream flow analysis

Dieison Antonello Deprá, Vagner Santos Da Rosa, Sergio Bampi. A novel hardware architecture design for binary arithmetic decoder engines based on bitstream flow analysis. In Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta, editors, Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008. pages 239-244, ACM, 2008. [doi]

Abstract

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