Gate-level process variation offset technique by using dual voltage supplies to achieve near-threshold energy efficient operation

Benjamin Stefan Devlin, Makoto Ikeda, Kunihiro Asada. Gate-level process variation offset technique by using dual voltage supplies to achieve near-threshold energy efficient operation. In Hiroaki Kobayashi, Makoto Ikeda, Fumio Arakawa, editors, 2012 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XV, Yokohama, Japan, April 18-20, 2012. pages 1-3, IEEE, 2012. [doi]

Authors

Benjamin Stefan Devlin

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Makoto Ikeda

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Kunihiro Asada

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