Gate-level process variation offset technique by using dual voltage supplies to achieve near-threshold energy efficient operation

Benjamin Stefan Devlin, Makoto Ikeda, Kunihiro Asada. Gate-level process variation offset technique by using dual voltage supplies to achieve near-threshold energy efficient operation. In Hiroaki Kobayashi, Makoto Ikeda, Fumio Arakawa, editors, 2012 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XV, Yokohama, Japan, April 18-20, 2012. pages 1-3, IEEE, 2012. [doi]

@inproceedings{DevlinIA12-1,
  title = {Gate-level process variation offset technique by using dual voltage supplies to achieve near-threshold energy efficient operation},
  author = {Benjamin Stefan Devlin and Makoto Ikeda and Kunihiro Asada},
  year = {2012},
  doi = {10.1109/COOLChips.2012.6216585},
  url = {http://dx.doi.org/10.1109/COOLChips.2012.6216585},
  researchr = {https://researchr.org/publication/DevlinIA12-1},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {2012 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XV, Yokohama, Japan, April 18-20, 2012},
  editor = {Hiroaki Kobayashi and Makoto Ikeda and Fumio Arakawa},
  publisher = {IEEE},
  isbn = {978-1-4673-1201-1},
}