Arnab Dey, Sebin Jose, Kuruvilla Varghese, Shayan Garani Srinivasa. A high-throughput clock-less architecture for soft-output Viterbi detection. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 779-782, IEEE, 2017. [doi]
Abstract is missing.