An automated design methodology for yield aware analog circuit synthesis in submicron technology

Sabyasachi Deyati, Pradip Mandal. An automated design methodology for yield aware analog circuit synthesis in submicron technology. In Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011, Santa Clara, California, USA, 14-16 March 2011. pages 229-235, IEEE, 2011. [doi]

Authors

Sabyasachi Deyati

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Pradip Mandal

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