Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility

Siva Nishok Dhanuskodi, Daniel Holcomb. Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility. In 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019. pages 314-319, IEEE, 2019. [doi]

@inproceedings{DhanuskodiH19,
  title = {Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility},
  author = {Siva Nishok Dhanuskodi and Daniel Holcomb},
  year = {2019},
  doi = {10.1109/ISVLSI.2019.00064},
  url = {https://doi.org/10.1109/ISVLSI.2019.00064},
  researchr = {https://researchr.org/publication/DhanuskodiH19},
  cites = {0},
  citedby = {0},
  pages = {314-319},
  booktitle = {2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-3391-1},
}