A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging

Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, R. Castro-López, Elisenda Roca, Francisco V. Fernández, Enrique Barajas, Xavier Aragonès, Diego Mateo. A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. In 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Italy, June 12-15, 2017. pages 1-4, IEEE, 2017. [doi]

Authors

Javier Diaz-Fortuny

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Javier Martín-Martínez

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Rosana Rodríguez

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Montserrat Nafría

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R. Castro-López

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Elisenda Roca

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Francisco V. Fernández

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Enrique Barajas

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Xavier Aragonès

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Diego Mateo

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