A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging

Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, R. Castro-López, Elisenda Roca, Francisco V. Fernández, Enrique Barajas, Xavier Aragonès, Diego Mateo. A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. In 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Italy, June 12-15, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{Diaz-FortunyMRN17a,
  title = {A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging},
  author = {Javier Diaz-Fortuny and Javier Martín-Martínez and Rosana Rodríguez and Montserrat Nafría and R. Castro-López and Elisenda Roca and Francisco V. Fernández and Enrique Barajas and Xavier Aragonès and Diego Mateo},
  year = {2017},
  doi = {10.1109/SMACD.2017.7981600},
  url = {https://doi.org/10.1109/SMACD.2017.7981600},
  researchr = {https://researchr.org/publication/Diaz-FortunyMRN17a},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Italy, June 12-15, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-5052-9},
}