Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining

Andreas Dielacher, Matthias Függer, Ulrich Schmid. Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining. In Srikanta Tirthapura, Lorenzo Alvisi, editors, Proceedings of the 28th Annual ACM Symposium on Principles of Distributed Computing, PODC 2009, Calgary, Alberta, Canada, August 10-12, 2009. pages 276-277, ACM, 2009. [doi]

Abstract

Abstract is missing.