Optimal Transistor Tapering for High-Speed CMOS Circuits

Li Ding 0002, Pinaki Mazumder. Optimal Transistor Tapering for High-Speed CMOS Circuits. In 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France. pages 708-715, IEEE Computer Society, 2002. [doi]

@inproceedings{DingM02:0,
  title = {Optimal Transistor Tapering for High-Speed CMOS Circuits},
  author = {Li Ding 0002 and Pinaki Mazumder},
  year = {2002},
  url = {http://csdl.computer.org/comp/proceedings/date/2002/1471/00/14710708abs.htm},
  researchr = {https://researchr.org/publication/DingM02%3A0},
  cites = {0},
  citedby = {0},
  pages = {708-715},
  booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1471-5},
}