An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs - researchr publication authors

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Li Ding, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins. An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2010, Kuala Lumpur, Malaysia, December 6-9, 2010. pages 208-211, IEEE, 2010. [doi]

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