A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing

Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo. A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing. IEEE Trans. VLSI Syst., 21(1):151-156, 2013. [doi]

@article{DoCKY13,
  title = {A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing},
  author = {Anh-Tuan Do and Shoushun Chen and Zhi-Hui Kong and Kiat Seng Yeo},
  year = {2013},
  doi = {10.1109/TVLSI.2011.2178276},
  url = {http://dx.doi.org/10.1109/TVLSI.2011.2178276},
  researchr = {https://researchr.org/publication/DoCKY13},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {21},
  number = {1},
  pages = {151-156},
}