0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance

Anh-Tuan Do, Chun Yin, Kavitha Velayudhan, Zhao Chuan Lee, Kiat Seng Yeo, Tony Tae-Hyoung Kim. 0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance. J. Solid-State Circuits, 49(7):1487-1498, 2014. [doi]

@article{DoYVLYK14,
  title = {0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance},
  author = {Anh-Tuan Do and Chun Yin and Kavitha Velayudhan and Zhao Chuan Lee and Kiat Seng Yeo and Tony Tae-Hyoung Kim},
  year = {2014},
  doi = {10.1109/JSSC.2014.2316241},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2316241},
  researchr = {https://researchr.org/publication/DoYVLYK14},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {49},
  number = {7},
  pages = {1487-1498},
}