A 12T SRAM in-Memory Computing differential current architecture for CNN implementations

Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez, José Ángel Díaz-Madrid. A 12T SRAM in-Memory Computing differential current architecture for CNN implementations. In IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023. pages 1-5, IEEE, 2023. [doi]

Abstract

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