ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications

Aihua Dong, Javier A. Salcedo, Srivatsan Parthasarathy, Yuanzhong (Paul) Zhou, Sirui Luo, Jean-Jacques Hajjar, Juin J. Liou. ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications. Microelectronics Reliability, 79:201-205, 2017. [doi]

Authors

Aihua Dong

This author has not been identified. Look up 'Aihua Dong' in Google

Javier A. Salcedo

This author has not been identified. Look up 'Javier A. Salcedo' in Google

Srivatsan Parthasarathy

This author has not been identified. Look up 'Srivatsan Parthasarathy' in Google

Yuanzhong (Paul) Zhou

This author has not been identified. Look up 'Yuanzhong (Paul) Zhou' in Google

Sirui Luo

This author has not been identified. Look up 'Sirui Luo' in Google

Jean-Jacques Hajjar

This author has not been identified. Look up 'Jean-Jacques Hajjar' in Google

Juin J. Liou

This author has not been identified. Look up 'Juin J. Liou' in Google