A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time ΣΔ ADC for a Digital Closed-Loop Class-D Amplifier - researchr publication authors

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Achille Donida, Remy Cellier, Angelo Nagari, Piero Malcovati, Andrea Baschirotto. A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time ΣΔ ADC for a Digital Closed-Loop Class-D Amplifier. IEEE Trans. on Circuits and Systems, 62-I(3):645-653, 2015. [doi]

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