BluSTL: Controller Synthesis from Signal Temporal Logic Specifications

Alexandre Donzé, Vasumathi Raman. BluSTL: Controller Synthesis from Signal Temporal Logic Specifications. In Goran Frehse, Matthias Althoff, editors, 1st and 2nd International Workshop on Applied veRification for Continuous and Hybrid Systems, ARCH@CPSWeek 2014, Berlin, Germany, April 14, 2014 / ARCH@CPSWeek 2015, Seattle, WA, USA, April 13, 2015. Volume 34 of EPiC Series in Computing, pages 160-168, EasyChair, 2015. [doi]

Abstract

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