Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena. Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use. In IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022. pages 1828-1832, IEEE, 2022. [doi]
@inproceedings{DorzhigulovMS22,
title = {Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use},
author = {Anuar Dorzhigulov and Shubham Mishra and Vishal Saxena},
year = {2022},
doi = {10.1109/ISCAS48785.2022.9937514},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937514},
researchr = {https://researchr.org/publication/DorzhigulovMS22},
cites = {0},
citedby = {0},
pages = {1828-1832},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022},
publisher = {IEEE},
isbn = {978-1-6654-8485-5},
}